51 Single chip computer estimates have been used , It can be done alone P1 The first one in the mouth IO Operate , however STM32 This is not allowed , For example 51 Single chip microcomputer can also be independent of a certain IO Operate alone , The concept of bit band operation is introduced , In short , In short , It's to operate alone 32 One of the ports in it , That's why we have a bit band mechanism .
Potential zone , And bit aliased area , Potential zone , That's what you want to do alone IO Area of , that is PA,PB Wait for this pile IO The memory area of the port , And the bit is aliased , It's the address area that gives everyone a new name .M3 kernel
Memory mapping table ,1M In memory BitBand area , There are also corresponding ones 32M In memory BitBand Alias area , Because you inflate each one into one 32 position , Therefore, the memory of the corresponding alias area will also be bitband 32 times .
Official calculation formula , Take peripherals as an example
AliasAddr=0X42000000+（（A-0X40000000）*8+n）*4=0X42000000+（A-0X40000000）*32+n*4
AliasAddr Is the address of the alias area ,A yes GPIOA->ODR Address of ,n Is a bit on the port , Here it is 1, Through this formula, you can find the address of the corresponding alias area , The next step is to operate on this address , You write for him 1, This bit is output 1, write 0, Just output 0.
0x42000000 Is the starting address of the bit alias region ,A Is the output data register GPIOA->ODR Address of ,A The bitband base address is subtracted first , The offset address relative to the base address of the bit band is obtained , So after the expansion, it is still an offset address , Is the offset from the bitalias base address , Add upper alias base address , The corresponding alias address is obtained , This is the general principle ,
((A‐0x40000000)*8+n)*4 =0x42000000+ (A‐0x40000000)*32 + n*4
Each bit corresponds to one 32 Character of bit , This completes the final address translation , The key is to pay attention to two points , everything , The mutual conversion of two parts of address , Mainly the base address of each part . Second, it's bit up 32 A method concept such as bit address .
// Bit band operation , realization 51 allied GPIO control function
// Concrete realization idea , reference resources 《CM3 Authoritative guide 》 Chapter five （87 page ~92 page ）.M3 with M4 similar , It's just that the register address has changed
//IO Port operation macro definition
#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr
&0xFFFFF)<<5)+(bitnum<<2))
#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
//IO Port address mapping
#define GPIOA_ODR_Addr (GPIOA_BASE+20) //0x40020014
#define GPIOB_ODR_Addr (GPIOB_BASE+20) //0x40020414
#define GPIOC_ODR_Addr (GPIOC_BASE+20) //0x40020814
#define GPIOD_ODR_Addr (GPIOD_BASE+20) //0x40020C14
#define GPIOE_ODR_Addr (GPIOE_BASE+20) //0x40021014
#define GPIOF_ODR_Addr (GPIOF_BASE+20) //0x40021414
#define GPIOG_ODR_Addr (GPIOG_BASE+20) //0x40021814
#define GPIOH_ODR_Addr (GPIOH_BASE+20) //0x40021C14
#define GPIOI_ODR_Addr (GPIOI_BASE+20) //0x40022014
//IO Mouth operation , Only for single IO mouth
// ensure n The value of is less than 16
#define GPIOA_IDR_Addr (GPIOA_BASE+16) //0x40020010
#define GPIOB_IDR_Addr (GPIOB_BASE+16) //0x40020410
#define GPIOC_IDR_Addr (GPIOC_BASE+16) //0x40020810
#define GPIOD_IDR_Addr (GPIOD_BASE+16) //0x40020C10
#define GPIOE_IDR_Addr (GPIOE_BASE+16) //0x40021010
#define GPIOF_IDR_Addr (GPIOF_BASE+16) //0x40021410
#define GPIOG_IDR_Addr (GPIOG_BASE+16) //0x40021810
#define GPIOH_IDR_Addr (GPIOH_BASE+16) //0x40021C10
#define GPIOI_IDR_Addr (GPIOI_BASE+16) //0x40022010
#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) // output
#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) // input
#define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) // output
#define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) // input
#define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) // output
#define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) // input
#define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) // output
#define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) // input
#define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) // output
#define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) // input
#define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) // output
#define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) // input
#define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) // output
#define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) // input
#define PHout(n) BIT_ADDR(GPIOH_ODR_Addr,n) // output
#define PHin(n) BIT_ADDR(GPIOH_IDR_Addr,n) // input
#define PIout(n) BIT_ADDR(GPIOI_ODR_Addr,n) // output
#define PIin(n) BIT_ADDR(GPIOI_IDR_Addr,n) // input
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