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1 代码编写
1. 赋值符号
=:用作数值赋值,等号左边通常是integer或者real类型
<+:用于对electrical型赋值,需要在仿真器中迭代运算,必须被放在analog begin里面;多个<+等式的运算不存在计算顺序的先后
2. 输入输出关系
不像数字verilog中只需考虑代码逻辑性和高低电平的问题,在模拟环境中,输入输出需要考虑电流,电压,阻抗,模拟电路所有的共能描述都归结于以上三个属性,通常通过定义其中的二者来确定第三者,例如:
3. 阻抗的描述
感性阻抗:
容性阻抗:
4. 积分操作
input是需要做积分的计算项,积分上限是当前仿真时间;
ic表示初始值;
assert默认为1,在DC仿真中,如果assert=1,计算返回ic值;若assert=0,初始值由DC计算产生。
5.内部节点
为了保存中间结果,需要定义内部节点
6.串并联
串联:表示ip1和ip2通过节点net1串联
并联:总电流等于各自电流之和
7. genvar变量
该数据类型可以指定总线中的端口;但只能在analog行为模块内使用,且对它的赋值和修改只能是一个常数或另一个genvar变量
8. 模拟事件cross
cross在exper1 信号穿过0值(即类似数电中信号边沿触发)的时候,begin里的语句执行;
direction表示穿越方向,1上升沿,0表示双向,-1表示下降沿;
time_tol和expr_tol分别表示变化的时间和数值下限,将time_tol设置为1u,则所有持续时间小于1us的毛刺将被忽略。
即使毛刺的尖峰为0,也不会触发cross事件。
9. 模拟事件above
above表示信号值大于0时,其中的语句会被执行,与cross不同的是,above是一个静态检测,它在DC,initial_step等静态点仿真中也能被触发。
10. 事件timer
@(timer(start_time[, period[, timeto1]])) begin end
timer用于周期性的时间,比如生成时钟信号;
start_time表示开始时间
period表示周期时间;
timeto1表示允许的最小时间误差
11. 瞬态函数transition
该函数减缓信号的变化,通常用作给输出节点信号赋值,
rise_time表示上升延迟时间
12. 压摆率函数slew
显示信号连续变化的速度
max_pos_rate,max_neg_rate表示上升和下降的最大摆率